RegViz: Visualize OPACR3 Bitfield

NXP Semiconductors /MIMXRT1021 /AIPSTZ1 /OPACR3

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Interpret as OPACR3

OPAC28=TP0, OPAC30=TP0, OPAC27=TP0, OPAC29=TP0, OPAC31=TP0, OPAC25=TP0, OPAC26=TP0, OPAC24=TP0

Description

Off-Platform Peripheral Access Control Registers

Fields

OPAC31	Off-platform Peripheral Access Control 31 0 (TP0): Accesses from an untrusted master are allowed. 1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
OPAC30	Off-platform Peripheral Access Control 30 0 (TP0): Accesses from an untrusted master are allowed. 1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
OPAC29	Off-platform Peripheral Access Control 29 0 (TP0): Accesses from an untrusted master are allowed. 1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
OPAC28	Off-platform Peripheral Access Control 28 0 (TP0): Accesses from an untrusted master are allowed. 1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
OPAC27	Off-platform Peripheral Access Control 27 0 (TP0): Accesses from an untrusted master are allowed. 1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
OPAC26	Off-platform Peripheral Access Control 26 0 (TP0): Accesses from an untrusted master are allowed. 1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
OPAC25	Off-platform Peripheral Access Control 25 0 (TP0): Accesses from an untrusted master are allowed. 1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
OPAC24	Off-platform Peripheral Access Control 24 0 (TP0): Accesses from an untrusted master are allowed. 1 (TP1): Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.

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